(1) Field of the Invention
This invention relates to a semiconductor device and a method for fabricating a semiconductor device and, more particularly, to a semiconductor device in which a semiconductor can be made to epitaxial-grow with high selectivity and a semiconductor device fabrication method by which a semiconductor is made to epitaxial-grow with high selectivity.
(2) Description of the Related Art
Attention has recently been riveted on an elevated or recessed source/drain MOSFET in which a silicon (Si) film or a silicon germanium (SiGe) film is formed in source/drain regions of a MOSFET. It is expected that these MOSFETs will be utilized as techniques for improving the performance of transistors beyond the 90 nm node.
A structure in which an SiGe layer, for example, is made to epitaxial-grow on an Si substrate is adopted in source/drain regions especially in a recessed source/drain MOSFET. If the SiGe layer is made to epitaxial-grow in the source/drain regions, a channel region is compressed from the direction of a source/drain because the lattice constant of SiGe is greater than the lattice constant of Si. This improves hole mobility in the channel region. Therefore, with this type of MOSFET, current driving capability can be enhanced significantly.
The method of making the SiGe layer selectively epitaxial-grow only on the Si substrate is adopted to make the SiGe layer epitaxial-grow in the source/drain regions of the recessed source/drain MOSFET. By making the SiGe layer selectively epitaxial-grow only in the recessed source/drain region, source/drain electrodes are electrically separated from a gate electrode by an insulating layer which is a side wall. With such an element, it is important to suppress an OFF-state leakage current which flows between a source/drain electrode and a gate electrode.
In actual selective epitaxial growth, however, there are cases where an SiGe layer also grows on a side wall because of low selectivity between an Si substrate and an insulating layer (deterioration in selectivity).
FIG. 21 is a sectional view showing an important part of a recessed source/drain MOSFET in which a deterioration in selectivity has occurred.
As can be seen from FIG. 21, an SiGe layer 330 is formed not only on source/drain electrodes 310 on a substrate 300 but also on side walls 320 which are insulating layers. In this case, the source/drain electrodes 310 are electrically connected to a gate electrode 340 and an excessive OFF-state leakage current flows between the source/drain electrodes 310 and the gate electrode 340. As a result, a function as a MOSFET is lost. Factors in a deterioration in selectivity have not fully been clarified because it is caused by a complicated surface reaction. However, the following, for example, may be a factor in a deterioration in selectivity.
Insulating layers formed in an LSI manufacturing process are mainly an Si oxide film and an Si nitride film. These films are formed by various methods such as thermal chemical vapor deposition (CVD) and plasma CVD. The state of the surface of an insulating layer formed depends on a growth method. All the surface of an insulating layer is not in a state of saturated bonding. For example, dangling bonds or the like are exposed in some portions of the surface of an insulating layer. If semiconductor material gas adsorbs to a dangling bond or the like, a semiconductor nucleus begins to grow on the insulating layer after the elapse of a certain period of time (latent period). This nucleus grows to a film. As a result, a semiconductor film is formed on the insulating layer.
To establish a selective growth process, it is preferable that the latent period on the insulating layer should be lengthened substantially. However, the latent period depends on the state of the surface of the insulating layer, a growth condition, or the like. Accordingly, really an ample latent period is not secured, depending on the state of the surface of the insulating layer, a growth condition, or the like.
As stated above, in an actual selective epitaxial growth process it is difficult to make a semiconductor film epitaxial-grow only on the surface of a specific semiconductor.
To solve this problem, an attempt to utilize an etching technique is made. This method comprises the steps of adding hydrogen chloride (HCl) gas for etching to semiconductor material gas and making SiGe selectively epitaxial-grow only on the surface of a semiconductor substrate while etching SiGe which grows on an insulating layer (see, for example, Japanese Patent Laid-Open Publication No. 2004-363199 and T. I. Kamins, G. A. D. Briggs, and R. Stanley Williams, “Influence of HCl on the chemical vapor deposition and etching of Ge islands on Si(001)” APPLIED PHYSICS LETTERS, Vol. 73, No. 13, pp. 1862-1864 (1998)).
With the above method using an etching technique, however, the temperature of the substrate must be higher than or equal to 600° C. to increase the rate at which SiGe that grows on the insulating layer is etched by, for example, HCl. If the temperature of the substrate is higher than or equal to 600° C., the influence of the thermal diffusion of impurities contained in the element in extremely small quantities becomes powerful. In addition, the SiGe layer and the insulating layer are, for example, eroded by HCl.
On the other hand, if the temperature of the substrate is lower than or equal to 600° C., the rate at which SiGe is etched by HCl is slow. Accordingly, even if semiconductor material gas is mixed with HCl gas as additive gas at the time of the selective epitaxial growth of SiGe, the rate at which SiGe is etched is slower than the rate at which SiGe grows. As a result, SiGe also grows on the insulating layer. This means that a manufacturing process condition suitable for actual mass production cannot be obtained.